Manufacturers of microelectronic devices use a variety of wafer processing techniques to fabricate semiconductor integrated circuits. One technique that has many important applications is known as plasma processing. In plasma processing, a substantially ionized gas, usually produced by a radio-frequency (RF) or microwave electromagnetic gas discharge, provides activated neutral and ionic species that chemically react to deposit or to etch material layers on semiconductor wafers in plasma processing equipment.
Applications of plasma-assisted processing techniques for semiconductor device manufacturing include reactive-ion etching (RIE) of polysilicon, aluminum, oxide and polyimides; plasma-enhanced chemical-vapor deposition (PECVD) of dielectrics, metals, and other materials; low-temperature dielectric chemical-vapor deposition for planarized inter-level dielectric formation; and low-temperature growth of epitaxial semiconductor layers. Additional applications of plasma processing include plasma surface cleaning and physical-vapor deposition (PVD) of various material layers.
In plasma-assisted deposition and etching, a process "activation switch" acts on the electromagnetic process energy source and begins the plasma-assisted fabrication process. Although not necessarily a tangible "ON/OFF" switch, an activation switch performs the process on/off function by starting a fabrication process by its activation of a process energy source (e.g., RF power source) and stopping the process by its removal of the energy source. An activation switch for a plasma-assisted process may, for example, be the presence of a radio-frequency electromagnetic gas discharge source or some other process energy source without which the process cannot occur.
Semiconductor device fabrication processes including etch and deposition techniques use a process activation switch in order to drive the desired process. In plasma processing, the particular type of plasma-assisted process to be performed affects the process activation switch choice. The choice of activation switch for any device fabrication process, regardless of whether the process is a deposition or etch process, also may significantly affect the final semiconductor device properties.
For example, J. Gibbons et al., "Limited Reaction Processing: Silicon Epitaxy," Applied Physic Letters, 47(7), 1 Oct. 1985, pp. 721-23, describes a material layer deposition process known as limited-reaction processing or "LRP" that uses a thermal process activation switch (wafer temperature). On the other hand, K. Tanjimoto, et a l., "A New Side Wall Protection Technique in Microwave Plasma Etching Using a Chopping Method," Extended Abstracts of the 18th (1986 International) Conference on Solid State Devices and Materials, Tokyo, 1986, pp. 229-32, describes a process known as "time-division gas chopping" that uses a reactive process gas flow as the process activation switch. Although these processes represent the most advanced known uses of single activation switches for material layer deposition and etch processes, respectively, each of these techniques have significant limitations.
LRP provides a capability for multilayer processing by using wafer temperature cycling as the only available process activation switch. Process environment for deposition of a subsequent layer is stabilized while the thermal switch is off. In LRP, a semiconductor wafer is placed within a single-wafer reaction process chamber filled with a desired process gas (e.g. for epitaxial silicon growth or polysilicon deposition). By only using a single thermal process activation switch, usually a heating lamp, LRP can deposit multiple material layers on a semiconductor wafer. To begin the process, first the process ambient is established by starting the desired process gas flows while the thermal activation switch is off (cold wafer). Then, the semiconductor wafer is heated to the desired process temperature by activating the process energy source (heating lamp). Once the wafer reaches the process temperature, a layer of material (e.g., epitaxial silicon) is deposited on the wafer to a desired thickness. Once the layer reaches the desired thickness, the heat source, which is the main process energy source, is turned off. The next step is to evacuate the process gases from the reactor process chamber and to establish the process environment for the next in-situ deposition step while the process activation switch (heating source) remains off. The semiconductor wafer is then restored to a high temperature by activating the heating source in preparation for a next elevated-temperature material layer growth or deposition step. An example of an LRP sequence may be as follows: a first layer may be an epitaxial silicon layer, a second layer may be an SiO.sub.2 layer, a third layer may be a polysilicon layer, followed by another oxidation step.
Because LRP uses only one process activation switch, it provides limited flexibility in depositing multiple layers by in-situ multiprocessing. Additionally, temperature activation switching used in LRP and other multiprocessing techniques can cause thermally-induced defects and stresses, both within the semiconductor substance and between the deposited or grown layers. The thermally-induced stresses and defects such as slip dislocations can arise from rapid cooling and heating that occurs between fabrication process steps. Since thermal energy is the only available process activation energy source, the process temperatures in LRP are rather high (e.g., 650.degree.-1200.degree. C. ) which can further increase the thermally-induced defect generation problem.
Consequently, there is need for semiconductor wafer multiprocessing techniques that permit in-situ deposition and/or etching of multiple layers on a semiconductor substrate with more than one process activation switch and multiple process energy sources.
There is also a need for a semiconductor wafer fabrication process that eliminates excessive thermal stresses and substrate defects caused by repetitive semiconductor wafer heating and cooling cycles between multiple layer depositions.
Time-division gas chopping eliminates some problems or limitations associated with conventional etching techniques. For example, some conventional plasma-assisted anisotropic etching techniques use a mixture of at least two process gases within a process chamber to generate a mixed gas plasma. The mixed process medium usually consists of a sidewall passivation gas and an etch gas. Using a composite process medium, however, gas discharge characteristics can become complex and many different activated species are produced within the process chamber. Sometimes the discharge characteristics are predictable; other times there are interactive gas-phase reaction effects between different activated species that are neither easily predictable nor desireable. For example, using a combination of two or more gases in the process chamber, gas discharge can produce a composite plasma medium that yields unwanted gas-phase reactions and nucleations. Gas-phase nucleations are caused by reactions between different activated plasma species, resulting in generation of particles and reduction of the semiconductor device fabrication yield. Thus, it is preferred to avoid those possible gas-phase reactions by reducing the number of different gases present within the activated plasma environments at the same time.
Anisotropic etching processes are expected to produce well-defined and near-vertical patterned layer sidewalls on semiconductor wafers following the removal of the etched portions. These near-vertical or vertical pattern sidewalls with minimal undercut are essential to the design and performance of the resulting integrated circuit. Particles from gas-phase nucleations within a composite plasma environment can produce defects on semiconductor devices. However, the use of multiple process gases and composite plasmas are essential in some anisotropic etch processes in order to prevent lateral etching or etch undercut and to increase the degree of plasma etch anisotropy. This is due to the fact that at least one gas in the mixed plasma environment forms a passivation layer on pattern sidewalls and prevents lateral etch or undercut.
Time-division gas chopping attempts to solve these problems of conventional plasma-assisted anisotropic etch processes by periodically switching between two different process gases. The first gas is usually a reactive etch gas (e.g. a halogen-containing compound) which can remove any exposed material layers; the second gas is a sidewall passivation gas which is supposed to prevent pattern lateral sidewall etch. The etch gas serves to etch the exposed material layer on a semiconductor wafer according to a pre-specified pattern design transferred to a photoresist or a hard-mask layer by microlithography. The sidewall passivation gas deposits a thin etch passivation layer on the substrate surface including etched pattern sidewalls. The thin sidewall passivation layer prevents lateral etching or undercutting of the sidewalls that could occur by the etch gas during a subsequent material etch step. This protects the pattern sidewalls during an anisotropic etching process following the surface passivation step. The passivation layer is sufficiently thin that during a subsequent anisotropic etching step, the directional and energetic ions in plasma can remove it from flat horizontal surfaces and form the desired circuit pattern by anisotropic etching. Sequentially depositing a passivation layer and performing an anisotropic etch step significantly reduces lateral sidewall etching. This results in an overall fabrication process yield improvement.
Time-division gas chopping also minimizes composite discharge effects and gas-phase nucleations and particle generation by using only one plasma process gas at a time. Using only one gas at a time also yields more predictable and reproducible etch results from one semiconductor wafer to another (wafer-to-wafer process repeatability).
Although time-division gas chopping results in some improvements over conventional mixed-gas composite plasma-assisted anisotropic etching techniques, significant limitations also exist in that process. By cyclicly or sequentially introducing the etch gas followed by the passivation gas, a throughput or etch rate degradation occurs, because of the rather slow gas flow transient times and the need to pump out the process chamber after each etch or passivation cycle and to reestablish the process environment for the subsequent passivation or etch process step at the end of each preceding process step. This requires a completely new volume of process gas to perform each etching or passivation step in a multi-step anisotropic etch process.
Another problem of time-division gas flow chopping also relates to the repeated etch process gas/passivation gas cycling. By starting and stopping gas flows through gas lines connected to the fabrication reactor, particulates from the gas lines and valves may enter the process chamber and contaminate the semiconductor wafer. Each sudden surge of gas flow, whether opening or closing the gas valves or mass-flow controllers, can introduce particulates into the process chamber. This particulate contamination degrades the semiconductor device manufacturing yield.
Yet another limitation associated with the time-division gas chopping technique relates to long gas flow transient times required for stabilizing the process chamber for sequential etch and passivation plasma environments between adjacent cycles. With each cycle, time delays on the order of several seconds to tens of seconds may be necessary to pump out the preceding process gas ambient and to stabilize the new process environment. For a given anisotropic etch process, it may be necessary to use a number of etch-passivation cycles in order to complete the etch process. As a result, the gas on/off cycles and process stabilization periods may contribute significantly to the total etch process time for each semiconductor wafer.
Thus, there is a need for a plasma-assisted semiconductor device fabrication technique that eliminates the need for composite mixed-gas discharge and minimizes any gas-phase nucleations and particulate contamination without reducing the overall wafer processing throughout.
There is a need for plasma-assisted semiconductor device fabrication etch and deposition techniques that allow the use of various process gases without the transient flow surges and particulate contamination from the gas flow lines and valves that may contaminate the semiconductor wafer.
There is yet a need for a plasma-assisted device fabrication technique that permits the use of alternating etch gas/passivation plasma processing cycles without having to deal with the long transient times associated with the time-division gas flow cycling method.